9 research outputs found

    Design of a Class-D Audio Amplifier With Analog Volume Control for Mobile Applications

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    A class-D audio amplifier with analog volume control (AVC) section and driver section for wireless and portable applications is proposed in this paper. The analog volume control section, including an integrator, an analog MUX, and a programmable gain amplifier (PGA) is implemented with three analog inputs (Audio, Voice, FM). For driver section, including a ramp generator, a comparator, a level shifter and a gate driver is designed to obtain a low distortion and a highefficiency. Designed with 0.18 um 1P6M CMOS technology, the class-D audio amplifier with analog volume control achieves a total root-mean-square (RMS) output power of 0.5W, a total harmonic distortion plus noise (THD+N) at the 8-Ω load less than 0.06%, and a power efficiency of 89.9% with a total area of 1.74mm2

    Design of the Digital I/O Pad Buffer for Mixed-Voltage Application

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    A new circuit design of digital bidirectional input/output (I/O) pad buffer for mixed voltage is presented. The digictal bidirectional I/0 buffer is designed to avoid reflections by matching the output impedance to the 50 ohms of the transmission line and having overshoots and undershoots below 300mV by increasing the output impedance. The digital bidirectional I/O pad buffer provides minimum delays between input and output and minimum rising and falling times. The proposed digital bidirectional I/O pad buffer was designed, simulated and layouted in Cadence using in TSMC  0.18um CMOS process with a linear resistive element electrically connected at an I/O pad for limiting a processed data I/O signal. The output rising time and falling time are 0.42 ns and 0.93 ns with 3pF load respectively. The final chip area is only 5 um2

    Li-Ion battery charger for Systems RF wireless

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    International audienceThe design of a Li-Ion battery charger for System RF wireless is presented in this paper. The proposed chip can create a reversible three-stage linear Li-Ion battery charger and is designed with gpdk180 nm CMOS processes. The three-stage charger functions include trickle-current charging, large-current charging and constant-voltage charging. This technique can reduce the damage of Li-Ion battery. The proposed circuit can adjust the maximum charge current of 1A, the constant voltage is set to 4.2V. Input voltage of the proposed circuit is from 4.4V to 4.8V. The average efficiency of the proposed charger is about 80%. The charger can precisely provide VOUT where range is from 2.2V to 4.2V. The chip area is 0.5×1mm

    Integrated energy management converter based on maximum power point tracking for photovoltaic solar system

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    This paper presents an integrated power control system for photovoltaic systems based on maximum power point tracking (MPPT). The architecture presented in this paper is designed to extract more power from photovoltaic panels under different partial obscuring conditions. To control the MPPT block, the integrated system used the ripple correlation control algorithm (RCC), as well as a high-efficiency synchronous direct current (DC-DC) boost power converter. Using 180 nm complementary metal-oxide-semiconductor (CMOS) technology, the proposed MPPT was designed, simulated, and layout in virtuoso cadence. The system is attached to a two-cell in series that generates a 5.2 V average output voltage, 656.6 mA average output current, and power efficiency of 95%. The final design occupies only 1.68 mm2

    A new high speed charge and high efficiency Li-Ion battery charger interface using pulse control technique

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    A new Li-Ion battery charger interface (BCI) using pulse control (PC) technique is designed and analyzed in this paper. Thanks to the use of PC technique, the main standards of the Li-Ion battery charger, i.e. fast charge, small surface area and high efficiency, are achieved. The proposed charger achieves full charge in forty-one minutes passing by the constant current (CC) charging mode which also included the start-up and the constant voltage mode (CV) charging mode. It designed, simulated and layouted which occupies a small size area 0.1 mm2 by using Taiwan Semiconductor Manufacturing Company 180 nm complementary metal oxide semi-conductor technology (TSMC 180 nm CMOS) technology in Cadence Virtuoso software. The battery voltage VBAT varies between 2.9 V to 4.35 V and the maximum battery current IBAT is 2.1 A in CC charging mode, according to a maximum input voltage VIN equal 5 V. The maximum charging efficiency reaches 98%

    High efficiency multi power source control constant current/constant voltage charger lithium-ion battery based on the buck converter

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    This paper proposes the design and simulation of a constant current/constant voltage (CC/CV) multi-power source lithium-ion (Li-ion) battery charging system based on the Buck typology. The aim of this new design that uses the Buck converter with multiple numbers of sources, is to provide sufficient energy for battery charging, with an analog switch to select the active source that has priority to guarantee the continuity of the charging without interruption. As well as the transition between the charging modes is smooth that is provided by a multiplexed switcher. At the same time is increases the efficiency of the system by using fewer power dissipation components and low output ripple. The obtained results show that the Li-ion battery can be successfully charged without reducing its life cycle. In the global, those technics allow reducing financial costs. This allows such a solution to be well-positioned in the industrial market (electric vehicles (EV) and medical)

    A new Li-ion battery charger with charge mode selection based on 0.18 um CMOS for phone applications

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    A new architecture of Li-Ion battery charger with charge mode selection is presented in this work. To ensure high efficiency, good accuracy and complete protection mode, we propose an architecture based on variable current source, temperature detector and power control. To avoid the risk of damage, the Li- Ion batteries charging process must change between three modes of current (trickle current (TC), constant current (CC), and constant voltage (CV)) in order to charge the battery with degrading current. However, the interest of this study is to develop a fast battery charger with high accuracy that is able to switch between charging modes without reducing its power efficiency, and to guarantee a complete protection mode. The proposed charger circuit is designed to control the charging process in three modes using the charging mode selection. The obtained results show that the Li-ion batteries can be successfully charged in a short time without reducing their efficiency. The proposed charger is implemented in 180 nm CMOS technology with a maximum charging current equal to 1 A and a maximum battery voltage equal to 4.22 V, (with input range 2.7-4.5 V). The chip area is 1.5 mm2 and the power efficiency is 90.09 %

    Design of 2MHz OOK transmitter/receiver for inductive power and data transmission for biomedical implant

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    In this work a 2 MHz on-off keying (OOK) transmitter/receiver for inductive power and data transmission for biomedical implant system is presented. Inductive link, driven by a Class E power amplifier (PA) is the most PA used to transfer data and power to the internal part of biomedical implant system. Proposed transmitter consists of a digital control oscillator (DCO) and a class E PA which uses OOK modulation to transfer both data and power to a biomedical implant. In proposing OOK transmitter when the transmitter sends binary value “0” the DCO and PA are turned off. With this architecture and 2 MHz carrier wave we have implemented a wireless data and power transfer link which can transmit data with data rate 1Mbps and bit error rate (BER) of 10-5. The efficiency of power transfer is 42% with a 12.7 uH transmitter coil and a 2.4 uH receiver coil and the power delivered to the load is about 104.7 mW. Proposed transmitter is designed for output power 4.1V. OOK receiver consists of an OOK demodulator, powered by rectified and regulated 5V p-p RF signal across the receiver coil. The supply voltage of proposed voltage regulator is 5 V with 9mV/V line regulation of. All circuits proposed in this paper were designed and simulated using Cadence in 0.18 um CMOS process

    A Design of Telemetry System for Small Animals

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    The external unit of small telemetry system for animals uses inductive link to transmit both data and power to a small implant. In this work, firstly, we have presented a wideband frequency shift keying (FSK) transmitter, which is a class E power amplifier (PA) switches between two load networks that make the PA tuned correctly at tow input clock frequencies. Carrier frequencies used for data modulation are 5MHz/10MHz, the data rate of the proposed link is 2.5 Mbps. On the other hand, the analog circuits of the internal unit are designed in this paper. Internal unit has a demodulator circuit to derive directly a frequency clock from the FSK carrier and to sample the binary data stream. It also has a low power generator circuit to generate the supply voltage to the other blocks. The low power generator is composed of a high efficiency, low power rectifier, and a low power voltage regulator. To minimize the quiescent current of the regulator, we propose a control section which is a two-stage error amplifier to control the gate voltage of the PMOS transistors used in the differential pair of the voltage regulator and thus stabilize the direct current (DC) level at its output signal (Vreg). The output voltage of the proposed generator circuit is regulated at 1V, the quiescent current simulated is about 9.9μA and the line regulation performance is only 8mV/V. All circuits proposed in this paper were designed and simulated using Cadence in 180 nm CMOS technology
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